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DSP56311 Overview
1.9.5 Timer Module
The triple timer module is composed of a common 21-bit prescaler and three independent and
identical general-purpose 24-bit timer/event counters, each with its own memory-mapped
register set. Each timer has the following properties:
A single signal that can function as a GPIO signal or as a timer signal
Uses internal or external clocking and can interrupt the DSP after a specified number of
events (clocks) or signal an external device after counting internal events
Connection to the external world through one bidirectional signal. When this signal is
configured as an input, the timer functions as an external event counter or measures
external pulse width/signal period. When the signal is used as an output, the timer
functions as either a timer, a watchdog, or a pulse width modulator.
1.9.6 EFCOP
The EFCOP interfaces with the DSP core via the peripheral module bus. It is a general-purpose,
fully programmable coprocessor that performs filtering tasks concurrently with the DSP core,
with minimum core overhead. The DSP core and the EFCOP can share data via an 8K-word
shared data memory. DMA channels shuttle input and output data between the DSP core and the
EFCOP. The EFCOP supports a variety of filter modes, some of which are optimized for cellular
base station applications:
Real finite impulse response (FIR) with real taps
Complex FIR with complex taps
Complex FIR generating pure real or pure imaginary outputs alternately
A 4-bit decimation factor in FIR filters, thus providing a decimation ratio up to 16
Direct form 1 (DFI) infinite impulse response (IIR) filter
Direct form 2 (DFII) IIR filter
Four scaling factors (1, 4, 8, 16) for IIR output
Adaptive FIR filter with true least mean square (LMS) coefficient updates
Adaptive FIR filter with delayed LMS coefficient updates
The EFCOP supports up to 10K taps and 10K coefficients in any combination of number and
length of filters (for example, eight filters of length 512, or 16 filters of length 256). It performs
either 24-bit or 16-bit precision arithmetic with full support for saturation arithmetic. A
cost-effective and power-efficient coprocessor, the EFCOP accelerates filtering tasks, such as
echo cancellation or correlation, concurrently with software running on the DSP core.
DSP56311 User’s Manual, Rev. 2
1-14
Freescale Semiconductor
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